
Search by job, company or skills
Showing 5 jobs
Skills:
analog mixed-signal IC layout design, transistor level and analog circuit topologies, ERC, DRC, Mentor Graphics, LVS, Cadence Virtuoso, Physical Verification
Skills:
Routing, floorplanning, Physical Verification, LVS, Analog Layout Design, Mixed-signal integrated circuits, ERC, Placement, DRC, Mentor Graphics, FPGA physical design, Cadence Virtuoso
Skills:
Ant, Mentor Calibre, LVS, Latch-up, signal and clock shielding, EMIR, CMOS circuit theory, Esd, ERC, DRC, isolation techniques, Cadence Virtuoso, Reliability
Skills:
Ant, Mentor Calibre, LVS, Latch-up, signal and clock shielding, EMIR, CMOS circuit theory, Esd, ERC, DRC, isolation techniques, Cadence Virtuoso, Reliability
Skills:
Ant, ERC, Reliability, LVS, Mentor Calibre, EMIR, Cadence Virtuoso, Esd, DRC, isolation techniques, CMOS circuit theory, Latch-up, signal and clock shielding
