Static Timing, Routing, Physical Verification, Synthesis, Power Efficiency, Custom Clocking, Physical Design, Placement, floorplanning, Formal Equivalency, IR-Drop

distributed databases, identity management systems, microservices architecture, DevOps practices, Security Protocols, event-driven systems, cloud-native architectures, identity verification services, asynchronous processing patterns, fault-tolerant systems, distributed systems design

Verification & Validation methodologies, Automation Testing, Design Verification, Functional Requirements testing, technical testing

LVS, analog block integration, CMOS Circuits, chip-level floorplanning, design scripts, Cadence PVS, Mentor Calibre, tape-out, BiCMOS circuits, Layout Design, Cadence Virtuoso, ERC, DRC, chip-level integration verification