Job Details

Job Description:

Join our high‑performance Silicon Validation team and play a critical role in enabling robust FPGA configuration, security, and HPS subsystems for next‑generation FPGA and SoC devices. You will lead device‑level and IP‑level validation of FPGA configuration flows, secure boot and root‑of‑trust features, and HPS components to ensure industry‑leading security, reliability, and system integrity.

This role offers hands‑on exposure to secure FPGA architectures, SoC bring‑up, embedded processors, and system‑level debug, while collaborating closely with architecture, design, firmware, and platform teams to influence future secure FPGA products.

Key Responsibilities

Develop comprehensive validation strategies for FPGA configuration, security, and HPS subsystems, aligned with device architecture, security requirements, and business objectives.
Validate FPGA configuration flows across multiple modes, including power‑on reset behavior, cold/warm configuration, partial reconfiguration, and recovery scenarios.
Perform security feature validation, including secure boot, authentication, encryption, key management, root‑of‑trust, and protection against misconfiguration or unauthorized access.
Validate HPS functionality and integration, including boot flows, reset sequencing, clocking, memory interfaces, and FPGA‑HPS interaction.
Create and execute test cases and vectors for configuration robustness, security corner cases, fault injection, and negative testing scenarios.
Perform device and system bring‑up, debugging configuration failures, security violations, boot hangs, and HPS‑to‑FPGA interface issues across silicon revisions.
Work with evaluation boards, reference platforms, and customer‑like systems to ensure interoperability and real‑world usage coverage.
Drive innovation in validation methodologies, automation, and infrastructure, improving test coverage, scalability, and efficiency for future FPGA and SoC generations.
Collaborate with hardware, firmware, and board design teams on configuration‑ and security‑ready evaluation platforms, influencing observability and debug capability.

Qualifications

Bachelor's or Master's degree in Electrical & Electronics Engineering, Computer Engineering, or related field.
8+ years of hands‑on silicon validation experience, with strong focus on FPGA configuration, security, SoC, or embedded processor subsystems.
Solid understanding of FPGA configuration architectures, including configuration memories, bitstream management, and recovery mechanisms.
Strong knowledge of hardware security concepts, such as secure boot, authentication, encryption, key storage, lifecycle states, and threat modeling.
Experience validating HPS / embedded processor subsystems, including boot loaders, reset/clock sequencing, memory bring‑up, and hardware‑software interaction.
Hands‑on experience with system‑level validation and debug, including power‑on bring‑up, failure analysis, and silicon issue triage.
Familiarity with FPGA and SoC architectures (strong advantage).
Experience or familiarity with Python for automation, scripting, and test infrastructure; Verilog familiarity is a plus.

Job Type

Regular

Shift

Shift 1 (Malaysia)

Primary Location:

Penang 15, Penang, Malaysia

Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

FPGA Post Silicon Validation Engineer - Configuration, Security and HPS