Physical Design, DFT Implementation, Layout Extraction, Rtl Design

Physical Design Engineer, Physical Design, Physical verification closure

static timing analysis, routing, Innovus, LVS, Parasitic Extraction, Fusion Compiler, DRC, Placement, floorplanning, Clock Tree Synthesis, ICC2

DRC, PERC resistance checks, Mentor-Calibre, LVS, Cadence Innovus, RTL handoff to GDSII, Signal Power Integrity, Voltus, pegasus, Physical Verification, EM IR drop analysis, Static Dynamic IR analysis

Routing, Python, Tcl, CTS, floorplanning, Placement Optimization, Antenna Density, LVS, Power Planning, IC Validator, Calibre, Physical Verification, Signoff Closure, Physical Design, ERC, Timing Closure, ECO Implementation, DRC