power management, Scripting and automation, IP integration, Custom layout design, Physical verifications, LVS, Analog layout techniques, Ageing and Reliability Compliance, Data converters, Floorplan constraints, Analog Macros, DRC, Electrical check, Full Spectrum Verifications, High-speed Analog Serdes, Pll, High-speed IPs

hierarchical layout techniques, 3nm technology, custom layout design, Mentor Graphics Calibre, Totem tools, Cadence Innovus, device matching, Cadence XL, designing custom analog blocks, full-chip integration, IR drop analysis, low-parasitic layout practices