power integrity , Unix, Linux, Tcl, Python, routing, signoff, electromigration signoff, physical signoff flows, Placement, Extraction, floorplanning, CTS, EM IR analysis, static and dynamic IR-drop analysis, decoupling strategies, power grid architectures, Ansys RedHawk, Cadence Voltus

hardware engineering , Perl Scripting, Tcl, Sta, Circuit Level Comprehension, RTL to GDSII Implementation, Leakage Power, Signal Integrity, Multi-Vt Flow, IC design, Dfm, Power Supply Management, Deep Sub-Micron Design, Physical Design, Power Gating, High Frequency Design, PDN Methodology, PPA Targets, Timing Signoff

EM IR understanding and fixes, PV closure, Util area reduction experiments, Physical aware Synthesis using FC, ECO cycle, STA analysis, PnR-Floorplan Macro placement, Density Congestion Timing issues and fixes on lower tech nodes 5nm