Tcl, Python, Perl, systemverilog, System Verilog Assertions, Emulation

lattice , System Verilog, Usb, Verilog, Ethernet, Ddr3, C, Pcie, ARM Cortex platforms, SystemC-DPI testing methodologies, embedded processors, processor architectures, FPGA architectures, SERDES, AHB, Xilinx, VirtuaLAB environments, Altera, APB, RTL synthesis concepts, DSP theory, Veloce platforms, UVM-acceleration, AMBA, Microsemi

Soc, Rtos, Python, Embedded Linux, inter-processor communication, secure boot development, BootROM, bare-metal environments, embedded firmware systems, bootloaders, power-management, platform firmware development, FPGA debug

C, Gdb, Python, Systemc, Emulation, qemu, Intel Simics, Simics Debugger

C, Verilog, Gdb, System Verilog, Python, Tcl, Zebu, Veloce, Palladium, waveform debuggers

System Verilog, Veloce, Zebu, Palladium, Hardware emulation platforms

Perl, Verilog, Python, Tcl, formal verification with Cadence LEC, Netlist CLP, Spyglass Lint CDC checks, UPF, clock domain crossing designs, Rtl Design, Synthesis, Logical Equivalence checks, low power design methodology

DDR, Automation Frameworks, Ethernet, emulation methodologies, hardware software co-design, emulation testbenches, emulation models, PCIe protocols, ARM Cores, FPGA architecture

Pli, Systemc, ProtoCompiler, hardware emulation, Cadence Z3, Simulators, Siemens Veloce, FPGA prototyping, Xilinx Vivado, Synplify Premier, Synopsys ZeBu, SV Verilog, Emulators, dpi