power management, Analog Design, data converters, ESD latch-up, analog feedback loops, Layout, references, control-loop stability, signal-conditioning blocks, charge pumps, Sensors, mixed-signal IC development, Verification, protection circuits, LDOs, switching converters, Simulation, IC-level reliability

Debugging, Silicon Validation, Circuit-layout interaction, Reliability, SPICE simulation, Simulation and verification, Analog layout considerations, Parasitics, Spectre, Calibre, ADE, PVT variation, Circuit Analysis, CMOS analog circuit design, Transistor-level design, Post-silicon analysis, Cadence Virtuoso, characterization, Analog Mixed-Signal IC Design, Device modeling, Noise mismatch stability, SpectreRF

temperature sensors , Silicon Validation, Analog Design, Op-amps, Oscillators, Bandgap, Current sense SAR ADCs, DC-DC converters, Design simulation and extraction tools, Protection circuits, ESD LU protection strategies, Control Loops, LDOs, Comparators, Compensation Strategies, Charge pumps

MATLAB, Precision Voltage References, Oscillators, Verilog-A, DACs, NVM Expertise, Circuit Design, BCD nodes, ADCs, Cadence Virtuoso, Current References, LDOs, Charge Pumps, Spice

bandgap references , temperature sensors , AC simulations, Schematic Maestro, frequency response, mixed-signal circuit design, low-noise Sigma-Delta converters, DC operating point, op-amps, mismatch analysis, biasing circuits, noise, INL, precision analog circuits, DNL, Stability, CMOS technologies, ADEXL, Layout XL, LDOs, THD, Spectre AMS, Cadence Virtuoso suite

MATLAB, EMI thermal co-optimization, Analog mixed-signal IC design, Clarity EMX, Voltage Regulators, Magnetics integration, Simulink, 3DIC package integration, IVR DC-DC converters, Spectre, Inductor modeling, Power management PMIC, Control Loops, 2.5D packaging flows, Cadence Virtuoso

systems architecture , Verification, Product Engineering, switching regulators, Validation, Layout, buck converters, analog power management IC design