Fpga, C, Pcie, Ethernet, Python, Test result analysis, Verilog RTL coding, ESD Latchup HTOL tests, Analyzers, Oscilloscopes, Peripheral chips, High speed SERDES, High speed interface design techniques, UCIe, Debug skills, Lab automation scripts, Schematic and layout level, Bit Error Rate Testers, CXL, Electrical and Protocol Interoperability and Compliance test suites, Protocol Exercisers, Post-Silicon PHY Systems Interop and Compliance testing, Signal and Power integrity checks

C, Usb, Ethernet, Tcl, Verilog, Labview, FPGA Design, Python, Pcie, Prototyping, DP, DDRIO, JESD204, RTL Coding, SRIO, Post-Silicon Physical Layer Electrical Validation, PCB schematic and layout design, Pre-Silicon IP SoC Physical Layer Electrical Validation, Network Analyzer, Oscilloscopes, FPGA coding, High speed SERDES protocol