Analog Layout - 5+ Years - Bangalore & Hyderabad Location

Company Description LeadIC Design Pvt Ltd accelerates semiconductor innovation through full-stack VLSI engineering expertise, supporting the complete chip development lifecycle for global semiconductor companies. Founded in 2018, the company has grown into a trusted partner known for deep technical capability, strong execution ownership, and flexible engagement models. With engineering teams across India and Canada, LeadIC provides high-quality design services tailored to product-focused teams. Its integrated offerings span custom, memory and analog layout, analog/mixed-signal and digital design, verification, physical design, STA, DFT, characterization, and FPGA-based prototyping. LeadIC emphasizes an engineering culture built on ownership, quality-driven execution, and long-term technical partnerships that help customers achieve silicon success.

Role Description This is a full-time, on-site Analog Layout role based in Bengaluru South. The Analog Layout Engineer will be responsible for creating and optimizing analog and mixed-signal layout structures, ensuring compliance with foundry design rules, and meeting performance, area, and reliability targets. Day-to-day tasks include floorplanning, device placement, routing critical analog paths, parasitic extraction review, and layout-versus-schematic (LVS) and design rule check (DRC) closure. The role involves close collaboration with circuit design, physical design, and verification teams to iterate on layout solutions, resolve issues, and support tape-out schedules. The engineer will also contribute to layout methodology improvements, documentation, and best practices to maintain consistency across projects.

Qualifications

• Candidates should possess strong skills in analog and mixed-signal Layout Design, including device-level layout, floorplanning, and routing for complex blocks.
• Candidates should possess skills in Page Layout and Graphics to effectively interpret schematics, constraints, and documentation, and present layout information clearly.
• Candidates should possess awareness of Graphic Design and Digital Marketing concepts only as complementary skills for technical documentation and internal knowledge sharing, if applicable.
• 5+ years of hands-on experience in analog/mixed-signal layout in advanced semiconductor process nodes (e.g., 40nm and below is preferred).
• Proficiency with industry-standard EDA tools for layout creation and signoff (such as Cadence Virtuoso, Mentor/Siemens Calibre, or equivalent).
• Strong understanding of foundry design rules, matching techniques, ESD structures, and layout considerations for noise, IR drop, and reliability.
• Ability to collaborate closely with circuit designers, work independently with ownership of assigned blocks, and deliver to tight schedules.
• Bachelor's or Master's degree in Electronics, Electrical Engineering, VLSI, or a related field, or equivalent practical experience.