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Location: Bayan Lepas, Penang, Malaysia
Job Type: Full-time (On-site)
Key ResponsibilitiesRequirementsReady to lead the future of mixed-signal design
Send your resume to [Confidential Information], only shortlisted candidates will be contacted.
Job ID: 152260527
Skills:
bandgap references , Dll, DDR, ADE, analog timing analysis, Design Verification, transistor-level simulation, analog RTL modeling, power delivery solutions, Spectre, Pll, high-speed clock distribution circuits, clock generation, SERDES, analog mixed-signal circuit design, Cadence Virtuoso, LDOs
Skills:
Dll, analog design timing analysis, DDR IO, Serder IO, LDO, ADE Cadence tools, Analog RTL modeling, Bandgap power-delivery simulation, Pure complex analog circuit, high-speed clk distribution, Pll, high speed IO
Skills:
analog circuits , Tcl, Gpio, Python, Perl, DDR, floorplanning, LPDDR, advanced process technologies, high-speed IO PHY, Extraction, Circuit Design, Makefiles, RV simulation, mixed-signal IPs, csh, Verification, physical design oversight, LVDS, Spice, Vlsi Design, Simulation