Fresh Graduate - Design Verification & DFT

VLSI / Electronics Engineer (Fresh Graduate Design Verification DV/ Design-For-Test DFT)

Location: Penang island

Ideal candidates:

• Recent fresh graduates in Bachelor's Degree in Electronics or Microelectronics Engineering
• Graduates who are currently/has completed training under ASEM / PSDC VLSI programs will have advantage.
• CGPA 3.5+ preferred.
• Strong understanding of VLSI fundamentals and semiconductor concepts.
• Able to join immediately or soon.
• Open to local Malaysians only.

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Job Description Digital Verification Engineer (Fresher)

We are looking for a motivated DV Engineer to join our IP verification team. You will support verification of complex digital IPs by developing UVM-based testbenches, verification environments, and assisting in RTL, power-aware, and gate-level verification. You will work closely with functional and crossfunctional teams to meet project milestones.

Requirements:

• Bachelor's degree in Electrical/Electronics or related field
• Basic understanding of ASIC/Digital verification concepts
• Knowledge of Verilog/SystemVerilog and UVM
• Exposure to scripting (Python/Perl) or assertions/coverage is a plus
• Good teamwork and communication skills

Job Description DFT Engineer (Fresher)

We are seeking an enthusiastic DFT Engineer to support design-for-test activities across digital designs. You will assist with scan, MBIST, boundary scan, and JTAG implementation, develop basic verification environments, and work with design and test teams to ensure test-ready, robust silicon.

Requirements:

• Bachelor's or Master's degree in Electrical/Electronics or Computer Engineering
• Basic understanding of DFT concepts (scan, ATPG, MBIST, JTAG)
• Exposure to synthesis or DFT tools (Genus, Design Compiler, Tessent is a plus)
• Willingness to collaborate with design, implementation, and test teams
• Detail-oriented with strong learning mindset