Physical Design Manager

Job Responsibilities:

• Lead and manage a team of Physical Design Engineers to deliver high-quality ASIC/SoC designs from RTL-to-GDS.
• Drive end-to-end physical design activities including floorplanning, power planning, placement, CTS, routing, timing closure, and physical signoff.
• Collaborate with Design, DFT, STA, Package, and Product Engineering teams to achieve project milestones and tape-out schedules.
• Own project planning, resource allocation, risk management, and execution.
• Drive methodology improvements, automation, and best practices to optimize PPA (Performance, Power, Area).
• Mentor and develop engineering talent while fostering a culture of technical excellence.

Job Requirements:

• Bachelor's or Master's degree in Electrical/Electronic Engineering or related field.
• At least 10+ years of ASIC/SoC Physical Design experience, with at least 3 years in a leadership or management role.
• Strong knowledge of physical design flow including floorplanning, placement, CTS, routing, timing closure, EM/IR, and physical verification.
• Hands-on experience with industry-standard EDA tools such as Synopsys ICC2/Fusion Compiler, PrimeTime, and Calibre.
• Proven track record of successful tape-outs on advanced technology nodes (7nm/5nm/3nm preferred).
• Strong scripting skills (Tcl, Python, Perl, or Shell).
• Excellent communication, stakeholder management, and leadership skills.
• Proficient in spoken Mandarin to effectively communicate with Mandarin-speaking stakeholders and engineering teams.