Senior DFT Engineer

Key Requirements:

• Strong understanding of the complete DFT flow from RTL through ATPG and MBIST pattern generation.

• Hands-on experience with Siemens Tessent platform.

• Expertise in DFT methodologies, scan, ATPG, and MBIST implementation.

• Strong scripting and automation skills (Python, Perl, TCL, Shell, etc.).

• Proven ability to drive automation initiatives and methodology improvements.

• Experience in developing productivity and quality enhancement flows across DFT development processes.

• Ability to collaborate with cross-functional design and verification teams.

Preferred Background:

• Semiconductor, VLSI, ASIC, or SoC design experience.

• Strong problem-solving and process improvement mindset.