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Senior SI/PI Packaging Engineer

5-15 Years
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  • Posted 22 days ago
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Job Description

  • Master's degree or higher in Microelectronics / Electronics / Automation or related field
  • Minimum 5+ years of SI/PI (Signal & Power Integrity) experience
  • Strong hands-on experience in packaging or system-level SI/PI simulation
  • Deep understanding of SI/PI fundamentals and transmission behavior
  • Proven experience using HFSS, SIWAVE, ADS, PowerSI, HSPICE or equivalent tools

Core Technical Expectations

  • Ability to analyze and optimize high-speed signal paths and power delivery networks
  • Strong experience in DDR / SerDes SI simulation and validation
  • Capability to interpret and extract simulation results (eye diagram, TDR, S-parameters, PDN analysis)
  • Experience supporting package design optimization and layout guidance
  • Ability to document simulation results and provide engineering recommendations

Highly Preferred

  • Experience in advanced packaging design environments
  • Exposure to IP development support and SI/PI standard definition
  • Strong communication skills with design teams and external stakeholders
  • Hands-on experience in system-level co-design (chip + package + board interaction)
  • Experience participating in design reviews and architectural discussions

Interested candidates please share updated CV to [Confidential Information]

 

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About Company

AVOWS Technologies Sdn Bhd

At Avows, our global network transcends borders, backed by a dedicated workforce at the helm of cutting-edge technologies. Millions worldwide have experienced the Avows difference. Committed to delivering more, we focus on benefiting our customers, associates, and communities across the globe. Fueled by new challenges, we consistently go the extra mile, offering genuine value. Our aim A better world for all, achieved together.

Unit 15-06 & 07, Tower A, The Vertical Business Suite Avenue 3,
Bangsar South, No.8, Jalan Kerinchi 59200 Kuala Lumpur
Tel: +603 2712 3456 Fax: +603 2712 3457

Job ID: 151075611

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