Signal Integrity Engineer

Engineer: Signal / Integrity - II

Period: 2026-01-01 to 2026-12-31,Can be renew

Description:

The package electrical engineer applies working knowledge of Electromagnetic theory on package level transmission line to ensure optimized design to comply signal and power integrity target performance.

Responsibilities In this position, you will perform signal integrity and power delivery of high speed interfaces. Additional responsibilities will include but not be Iimited to:

- Support electrical engineers by performance signal and power simulations throughout the package design cycle

- Analyze electrical results such as S-Parameters, IR drop, Loop inductance etc.

- Summarize results and recommendations in proper reports.

Specific simulation tools that are used as part of the signal integrity analysis process include ANSYS 3D Layout, ANSYS Q3D, Cadence PowerDC, and Power-SI.

Requirement:

Should possess a Bachelor, Master in Electrical/ Electronics Engineering or relevant disciplines with 3+ years in the related fields

Proven knowledge in the use of simulation and modeling tools such as, ANSYS 3D Layout, Q3D, PowerDC & Power SI to develop signal and power integrity design recommendations.

Good to have:

Experience in the electrical analysis and design of high-speed interconnects for Technology interfaces such as DDR, SerDes, PCIe and USB.

Understanding of the package design processes.

Excellent communication skills in English, both written and verbal

Ability to work independently and in a team environment.