Performed both Frequency and Time domain methods of SI/PI analysis.
Carried out Timing and Jitter, Cross-Talk and Noise, Channel Modelling and SerDes Equalizations, PDN and De-Coupling Analysis.
Worked with Design Engineers, PCB Layout and other Simulation Engineers to develop and ensure appropriate delivery and compliance of recommended product design constraints and Module design guides.
Participated in performing modelling of package substrate/PCB channels elements in 3D/2D EM simulation tools.
Generated implementation guidelines for the layout improvements required to meet the Signal Quality requirements using 3D field and channel simulators (HFSS).
Familiarised with PCB stack-up design, trade-offs in line geometries, PCB materials and surface finishes, vendor capabilities, Wire Harness and Cable Manufacturing Processes.
Performed High Speed IO Interface technologies like, Via Modelling, Antipad Optimization, TDR, Multi-Board channel simulation, On-Board IBIS/IBIS-AMI simulations, COM analysis etc.
Performed SI key parameters measurement, to full fill product requirements, and generate lab measurement reports using Lab instruments such as Microscopes/Network Analyzer, VNA, or High-power meters etc.
