I.C. design, synopsys primetime , Shell, Perl, Python, Tcl, Cadence Genus, Cadence Tempus, Synopsys DesignCompiler, ASIC Design, System-Verilog, RTL2GDS implementation

Tcl Scripting, Physical Design, Top Block Floor-planning, Cadence Innovus, Low-power design techniques

PERL, Python, Tcl, Custom Compiler, Calibre, Design Compiler, Fusion Compiler, EDA Tools, virtuoso, IC Compiler

Dac, Python Scripting, Automation Frameworks, Circuit Design, Layout and verification, Oscillators, IC design methodologies, Analog IC design, Temp Sensors, ADC, Switched regulator, Bandgap amplifier, Mixed Signal IC design