regulators , temperature sensors , Dll, Reference Circuits, PMU circuits, RC Oscillators, Validation, Mixed-Signal Design, Crystal Oscillators, Analog design and simulation tools, Switching Regulators, Pll, Signal Chains, Oscillator, Precision Comparators, Analog IC Design, characterization, Debug, Silicon bring-up

synchronicity , Unix, Perforce, Python, Shell Scripting, Git, Perl, Tcl, substrate noise analysis, Skill, Cadence custom IC Virtuoso platform, Cadence SKILL, starRC, Layout Automation, Calibre Physical Verification, ICV LVS, Analog Design environment, EMIR drop, agentic AI flows, finesim, Parasitic Extraction, PrimeSim, Virtuoso suite, SVRF

Analog Circuit Design, Monte Carlo analysis, Design extraction and simulation flows, Silicon validation and debug, Analog layouts, Verification using modern CAD tools, Transistor level design flow, Schematic generation

UNIX, signals systems and transforms, MOS transistors, Analog Circuit Design, layout tradeoffs, layout verification tools, device physics, High Volume Manufacturing, feedback systems, Mixed Signal Design, AC DC analysis, circuit simulation tools, CMOS Bi-CMOS fabrication processes, poles zeros compensation, loop dynamics, Modeling Tools, end-to-end design flow

bandgaps, CMOS image sensors, Simulation, noise analysis, Pll, Dft, bias op-amps, transistor level circuit design, top chip integration, Verification, LDOs, tapeout, AI tools, ADC architectures, analog mixed signal design, SERDES, switched-cap circuits, Timing Analysis, Silicon Bring up, feedback and compensation techniques, TCAD, high-speed TX, CMOS pixel design techniques, transistor capacitor matching, mixed-signal chip design