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Showing 4 jobs
Skills:
matching , parasitics, noise shielding, analog mixed-signal IC layout design, transistor level and analog circuit topologies, Mentor Graphics, Cadence Virtuoso, layout sensitivities
Skills:
Routing, floorplanning, Physical Verification, LVS, Analog Layout Design, Mixed-signal integrated circuits, ERC, Placement, DRC, Mentor Graphics, FPGA physical design, Cadence Virtuoso
Skills:
Ant, Mentor Calibre, LVS, Latch-up, signal and clock shielding, EMIR, CMOS circuit theory, Esd, ERC, DRC, isolation techniques, Cadence Virtuoso, Reliability
Skills:
Ant, Mentor Calibre, LVS, Latch-up, signal and clock shielding, EMIR, CMOS circuit theory, Esd, ERC, DRC, isolation techniques, Cadence Virtuoso, Reliability
