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Showing 3 jobs
Skills:
Makefile, Perl scripting, Verilog, Oop Concepts, Ruby, System Verilog, Post-silicon debugging, CPU architecture, Verification flows, Rtl Design, Asic Design Verification, JTAG protocols, Digital Design, Debugging firmware, Assembly language programming
Skills:
Makefile, Perl scripting, Verilog, Oop Concepts, Ruby, C, C++, Post-silicon debugging, JTAG protocols, Digital Design, Assembly language programming, RTL design and verification flows, Simulation Tools
Skills:
hardware engineering , C, Jtag, Verilog, Scripting Languages, System Verilog, IEEE1500, HDLs, memory dump, MBIST, scan dump, formal verification methodologies, CPU micro-architectures, CPU architectures, power management features, testbench components
