Soc, System Verilog, Pcie, DDR, Cpu, Arm, Ip, Uvm, verification planning, Execution, interface verification, SERDES, HBM, RISC-V, MCU, Ai, Debug

Ovm, Vcs, Usb, Shell, System Verilog, Python, Perl, Uvm, VLSI design flows, PCI Express, power-aware simulation techniques, AMBA protocols, high-speed IO IPs