Firmware, Computer Engineering, Cross Functional Team Building, RTL Synthesis, foundation design, Diagnostics, Working alongside Product Teams, Analog Design, Electrical Engineering, RTL Coding, Simulation, synthesis design, Fault Reporting

rtl verification , Verilog, AHB, SoC design flow, debugging methodologies, systemverilog, datapath design, reset strategy, Rtl Design, clock-domain handling, timing considerations, FSM design, APB, Axi, BUS Protocols, Simulation