Usb, Pcie, Perl, Verilog, Python, Makefiles, RTL Build flows, AMBA protocols, Debug architecture, Axi, SoC Clocks, SDCC, APB, RST, SOC design, AHB, System-Verilog

Perl, Python, Tcl, Physical Design, Sta, ASIC Implementation, EM, PDN, Ir, make

Ksh, Java, PowerShell, Kafka, Jenkins, Git, Perl, Ansible, Shell scripting, Bash, Python, Azure DevOps, RPM packaging, Podman Containers

code coverage , C, Shell, Perl, Verilog, Debugging, Python, System Verilog, Tcl, UVM methodology, Metric Driven Verification, formal verification methodologies, assertions, constrained random methodologies, functional coverage

Git, Linux, UNIX, Python, Tcl, SKILL scripting, CDF customization, OpenAccess OA APIs, Cadence Virtuoso

power integrity , Perl, Shell scripting, Python, Tcl, Physical Design signoff, power grid optimization, Cadence Voltus, electromigration concepts, Ansys RedHawk, static and dynamic IR drop analysis, EM IR analysis

C, Pcie, Perl, Python, Tcl, ONFI, LPDDR, NAND