lattice , synplify , System Verilog, Familiar with at least one mainstream FPGA and development platform Xilinx, Development tools including Xilinx ISE, Hardware description language VHDL, Synthesis tools of Synplicity, FPGA design processes, Verilog Hdl, Altera, altera quartus, Simulation tools of ModelSim SE, Solid Verilog RTL and test bench coding skills