Search by job, company or skills

5-10 Years
Not Disclosed
  • Posted 3 days ago
  • Be among the first 10 applicants

Job Description

Endivite Technologies is Hiring – Senior Analog Layout Engineer

We are looking for a Senior Analog Layout Engineer with 5–10 years of experience in analog/custom layout to join our growing team at Endivite Technologies.

Key Requirements:

5–10 years of hands-on experience in Analog/Custom Layout

Strong expertise in plansr technologies

Proficiency in Cadence Virtuoso

Strong understanding of matching techniques, floorplanning, and routing

Hands-on experience with DRC, LVS, ERC, PEX & post-layout verification

Experience with advanced nodes such as 180nm, 130nm and 16nm highly preferred

Good understanding of analog/mixed-signal layout methodologies and physical verification

Location: Bengaluru

Experience: 5–10 Years

Company: Endivite Technologies

If you are passionate about analog/custom layout and advanced-node semiconductor design, we would love to hear from you!

Interested candidates can DM me or directly share their updated profile.

#Hiring #EndiviteTechnologies #AnalogLayout #CustomLayout #FinFET #VLSI #ASIC #AnalogDesign #MixedSignal #CadenceVirtuoso #DRC #LVS #PEX #AdvancedNodes #Semiconductor #VLSIJobs #BengaluruJobs #HiringAlert

More Info

Key Skills

PEX

Plansr technologies

Analog mixed-signal layout methodologies

Matching techniques

Post-layout verification

DRC

Analog Custom Layout

Similar Jobs

4-8 yrs
Bengaluru, India
Skills:
cadence schematic capture , Hspice, high-speed custom digital design flows, AMs, Cadence Virtuoso, Spectre
8-10 yrs
Bengaluru, India
Skills:
temperature sensors , bandgap references , DNL, ADEXL, op-amps, INL, biasing circuits, Layout XL, THD, precision analog circuits, CMOS technologies, DC operating point, noise, Stability, LDOs, mixed-signal circuit design, AMs, Cadence Virtuoso suite, Spectre, Sigma-Delta converters, Schematic Maestro, AC simulations, frequency response, ip development, mismatch analysis
5-7 yrs
Bengaluru, India
Skills:
Matlab, Worst case identification, Monte Carlo analysis, Physical layout management, AMs, Analog Circuit Design, Spectre, Cadence tool set, Top level simulation, Simplis, Post layout parasitic extraction, Schematic generation and simulation, Top level verification, Knowledge of device physics and process technologies, Block level modelling, Simulation data analysis, IC transistor level implementation, IC system partitioning and architectural tradeoff analysis, Power IC design, Signal grounding and routing tradeoffs, Die area optimization
2-5 yrs
Bengaluru, India
Skills:
transistor-level design and simulation, PEX, post-layout verification, LVS, noise analysis, Analog Circuit Design, Spectre, advanced CMOS technology nodes, DRC, layout sensitivity, linearity matching, mixed-signal IC design, Cadence Virtuoso