ASIC Design Engineer(Graduate&Internship-MYS)

Responsibilities

1.AI accelerator PPA (Power, Performance, and Area) evaluation and analysis.

2.Write detailed design specifications of AI accelerator and its sub-components.

3.RTL design and implementation.

4.RTL simulation, debug and bug fixing.

5.PPA optimizations for the accelerator and the sub-modules.

6.Collaborate with DFT, Backend teams to deliver tape-out quality implementations.

Qualifications

1.Bachelor degree or above, major in Computer Science, Electrical Engineer or a related field of study.

2.Good knowledge in digital circuit design.

3.Experience in HDLs, e.g., Verilog,VHDL,System Verilog.

4.Experience in ASIC EDA tools.

5.Self-motivated, good team player.