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Brief JD – SoC DFX DV Engineer
Contract Duration- 1 Year(can be extended and renewed)
Role Summary
We are hiring a SoC DFX DV Engineer in Penang to work on chip-level Design for Test (DFX) verification for SoC products. The role focuses on developing and verifying DFX test plans, supporting silicon bring-up, and collaborating with test engineering teams for ATE testing.
Key Responsibilities
Required Skills
Preferred/Bonus Skills
Experience & Education
Job ID: 147546647
Skills:
Ovm, System Verilog, FPGA verification, validation test suites, Design Verification, Uvm, constrained random verification methodologies, FPGA prototyping, FPGA architecture
Skills:
Perl, Python, Asic verification, digital IP verification, SV, Uvm
Skills:
DDR, Usb, Pcie, Ethernet, Simulation and debug tools, Assertions SVA, Functional verification methodologies, Protocol verification, Uvm, systemverilog, Coverage-driven verification
Skills:
DDR, Pcie, Ethernet, Debugging, System Verilog, test bench development, test plan definition, Cadence, Uvm, assertion-based verification, ARM architectures, HSST, Functional Verification, Regression, Mentor Graphics, constrained random verification, Synopsys
Skills:
Perl, Vcs, Bash, Python, Axi, PCIe protocol, PIPE, Cadence, Synopsys, Uvm, systemverilog
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