Design Verification Engineer (USB)

Key Responsibilities:

• Develop and execute verification plans for USB IP/Controller designs.
• Build and maintain SystemVerilog/UVM verification environments (drivers, monitors, sequences, scoreboards).
• Create directed and constrainedrandom testcases to validate USB 2.0 / USB 3.x functionality.
• Perform functional coverage, regression testing, and debug failures with design teams.
• Verify compliance with USB protocol specifications and support chiplevel integration where needed.

Job Requirements:

• At least 4 years of relevant experiences.
• Bachelor's/Master's degree in Electronics, Electrical Engineering, Microelectronics, or VLSI.
• Strong understanding of digital design and ASIC verification concepts.
• Hands-on experience with SystemVerilog and UVM.
• Good knowledge of USB 2.0 / USB 3.0 / USB 3.1 protocols.
• Experience in functional verification, debugging, and coveragedriven methodology.
• Familiarity with simulation tools and waveform debug environments (VCS/Xcelium/Questa).