Digital IC Verification Engineer

We are looking for a Digital IC Verification Engineer to join a fast-growing R&D team at a fabless IC design company specializing in display driver ICs and power management ICs.

Description:

• Develop UVM-based testbenches for block-level and system-level verification.
• Build verification plans based on design specifications and functional requirements.
• Develop reusable verification components such as drivers, monitors, scoreboards, and agents.
• Implement constrained-random, directed, and coverage-driven test scenarios.
• Analyze functional coverage and code coverage metrics, and drive closure of coverage gaps.
• Integrate and verify third-party IPs and interface protocols (e.g., RISC-V, AMBA, ISP, MIPI, etc.).
• Debug and root-cause verification failures in collaboration with design engineers.
• Participate in design and verification reviews, and contribute to continuous process improvement.
• Collaborate with cross-functional teams (design, DFT, physical design, product engineering) to ensure design quality and schedule alignment.
• Maintain clear and organized verification documentation, including test plans, coverage reports, and regression results.

Requirements:

• 3–5 years of experience in digital IC verification (candidates with digital design-related expertise will also be considered).
• Bachelor's degree or above in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
• Proficient in Verilog / SystemVerilog.
• Hands-on experience with UVM-based verification environments.
• Solid understanding of digital logic design fundamentals and verification methodologies.