NBIO PCIE validation Engineer

About the role:

We're hiring one NBIO PCIE validation Engineer specializing in PCIe (Peripheral Component Interconnect Express) hardware debugging. You will work with finalized, manufactured silicon chips, using dedicated debug tools and methodologies to troubleshoot and resolve technical issues occurring in PCIe controllers and their associated systems. The core focus lies in validating the functionality of post-manufacturing silicon and addressing PCIe-specific problems to ensure product compliance and performance.

Responsibilities:

Develop and execute test plans for PCIe features.

Use debug tools like logic analyzers and oscilloscopes to capture and analyze PCIe traffic.

Root-cause issues by tracing problems back to their origin in the hardware design.

Collaborate with design and firmware teams to resolve issues.

Ensure PCIe compliance with industry standards.

Focus on identifying and fixing problems related to PCIe link training, data transfer, power management (such as Active-State Power Management or ASPM), and hot-plugging.

Conduct post-silicon validation by testing the functionality of manufactured silicon chips and detecting existing bugs.

Qualifications:

Minimum 8 years of relevant experience in post-silicon validation and PCIe hardware debugging.

Proficiency in using debug tools including logic analyzers and oscilloscopes for PCIe traffic analysis.

Strong capability in root-causing hardware design issues related to PCIe interfaces.

Solid understanding of PCIe protocol specifications, including link training, data transfer, ASPM power management, and hot-plugging mechanisms.

Ability to collaborate effectively with cross-functional teams including design and firmware teams.

Knowledge of industry standards for PCIe compliance validation.