About the role:
- You will shape the reliability and excellence of chips by planning, developing, and executing characterization test patterns. Ensuring design margins, speed specifications, and silicon performance are optimized across all device operating conditions and process corners.
- You will focus on high-performance hardened IP within Adaptive SoC products, including ARM-based processor subsystems and related components.
Responsibilities:
- Developing, executing and debugging characterization test suites in hardware and software for measuring the performance and design margins of hardened IP and subsystems with respect to parameters such as timing, frequency and voltage.
- Porting, maintaining and tracking test patterns, automation scripts and test flows between different pre- and post-silicon test platforms, including ATE.
- Collecting and analyzing characterization data across the full range of device operating conditions and device volume to generate characterization reports and insights based on silicon trends.
- Working with cross-functional teams to correlate data, debug and resolve issues.
Preferred qualification:
Experience of SoC or FPGA pre/post-silicon validation.
(with ATE experience a plus)
Logic design skills in VHDL/Verilog / SystemVerilog and an understanding of EDA tools.
Knowledge of scripting languages.
(such as Python, Tcl or Perl)
Proficiency in C/C++ for embedded systems Knowledge of embedded processor systems and on-chip interconnects will beneficial.
Understanding of statistical analysis.
Around 5 years of experience in pre-/post-silicon validation.
