Senior SI/PI Packaging Engineer

Job Responsibilities:

1. Responsible for signal integrity (SI) and power integrity (PI) analysis and optimization.

2. Perform packaging /system-level SIPI simulation analysis, extract parameters such as insertion loss, return loss, TDR, eye diagram, DC IR, PDN, AC ripple etc., assist packaging designers in optimizing design details, guide layout implementation, and write simulation reports.

3. Participate in ball-map layout planning and packaging design reviews.

4. Assist internal design teams and external clients in establishing reasonable SIPI standards.

5. Provide SIPI simulation guidance for IP product development.

Job Requirements:

1. Master's degree or above in Microelectronics/Automation or related fields, with over 5 years of SIPI work experience.

2. Proficient in theoretical knowledge of signal integrity and power integrity.

3. Proficient in using SIPI-related design tools such as HFSS, SIWAVE, ADS, PowerSI, HSPICE etc.

4. Experience in simulation of high-speed IPs such as DDR and SerDes.

5. Strong team spirit, willing to communicate and share knowledge.