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Showing 4 jobs
Skills:
Defect Tracking, Verilog, Test Planning, coverage analysis, RTL simulation, regression management, digital logic design concepts, interface protocols, Uvm, systemverilog, Verification Tools, formal verification, VHDL, EDA Tools, FPGA architectures, design verification methodologies
Skills:
Design Verification, object-oriented programming, Uvm
Skills:
PERL, System Verilog, Python, Uvm, verification tools and methodologies
Skills:
C, Makefile, Perl, C Shell, Verilog, Ruby, Oscilloscopes, Uvm, systemverilog, design verification methodology, Synopsys VC Verification IP VIP for USB, USB traffic generators and checkers
