shielding , IR drop, Common-centroid layout, Cadence layout tools, LVS, Power delivery planning, DLL layout implementation, Noise isolation, ERC, DRC, Guard rings, Device matching, Symmetry

Dll, Serder IO, Bandgap power-delivery simulation, high speed IO, pure analog circuit, Cadence layout tools, Pll, DDR IO, LDO, C4 bump RDL experience, IO ESD layout and analysis, IO floorplan power delivery planning

C4 Bump and RDL Experience, LDO Bandgap and Power Delivery Simulation, SerDes IO DDR IO or other High-Speed IO layouts, Cadence Layout Tools, Pure Analog Circuit Layout, PLL and DLL layouts, IO ESD Layout and Analysis, IO Floor planning and Power Delivery Planning