OASIS, Python, Shell, Perl, Tcl, PERC, LVS, CDL, Dfm, SVRF-based automation, Verilog netlists, XOR methodologies, layout connectivity, antenna density, ASIC physical verification, Spice, Cadence Pegasus, DEF, LEF, Siemens Calibre nmDRC, metal-fill, ERC, DRC, Synopsys ICV, GDSII

SystemVerilog Assertions (SVA), test environments , Gate-Level Simulation (GLS), Test Cases, Low power debug, Constrained-random verification environments, Uvm, systemverilog, Verification test benches, Formal tools, Verification methodologies, Coverage measures, formal verification

clocking , Ovm, DDR, Pcie, Verilog, Ethernet, Platform bring up in Emulators or Silicon, SOC boot flow, Constrained-random verification environments, Uvm, systemverilog, Power management flows, C SV tests, Low Power Verification, Coverage report generation, System Verilog Assertions, RTL GLS level simulations

Design-for-Debug (DFD) and Verification Debug, Verilog, Usb, Pcie, UVM-based Verification Environment Development, Verification Planning Execution, SoC Subsystem Verification, Testbench Development, Interconnect Verification, systemverilog, Functional Coverage, UFS, Axi, Assertions SVA, EMAC Ethernet, Coverage-driven Verification, AHB, AMBA ATB Protocols

.NET, .Net Core, C#, Graphql, Kafka, Css3, Angular, Automated Testing, Git, Typescript, Javascript, Gcp, Docker, Html5, ASP.NET, Distributed Systems, Azure, Kubernetes, AWS, NoSQL databases, Microservices architecture, CI/CD pipelines, Service Bus

C, Perl, Arm, Python, RISC-V Assembly, digital Verification, Cadence SKILL, Mixed-signal Verification, Uvm, systemverilog, UVM testbench creation

Java, Kafka, Python, API design, Incident Management, Gcp, Distributed Systems, Kubernetes, Testing, Go, Alerting systems, Flink, Microservices architecture, developer tools, Streaming Data, SDKs, Monitoring

Openmp, Valgrind, Hpc, RDMA, SVE, ARM Neon, RoCE, MPI, simd, AVX-512, DPDK, Purify