Perl, Python, Asic verification, digital IP verification, SV, Uvm

Design Verification, object-oriented programming, Uvm

C, System Verilog, Python, verification tools and methodologies, Uvm

C, Makefile, Perl, C Shell, Verilog, Ruby, Oscilloscopes, Uvm, systemverilog, design verification methodology, Synopsys VC Verification IP VIP for USB, USB traffic generators and checkers