Design of Experiments (DOE, Quality Assurance, Technical Leadership, SI PI simulation and validation, Lean, Embedded electrical and electronic product design, Project Management, design for manufacturing, Lean and Quality mindset, 8D Corrective Actions, Customer Stakeholder Management

Statistical Process Control (SPC), Performance Monitoring, equipment failure analysis, thin-film deposition equipment, PLC systems, equipment interface systems, sputtering equipment, automation control, manufacturing equipment control systems, vacuum systems, equipment troubleshooting, equipment reliability improvement, equipment data analysis, technical documentation and reporting

Splunk, SQL Server, Windows Server, Anaplan, T-sql, Sap Bw, Sap Ibp, Gcp, Sap Erp, Windows Task Scheduler

Perl, PowerShell, Bash, Python, PCIe Gen5, signal integrity analysis, BERT systems, high-bandwidth oscilloscopes, PCIe Gen6

Statistical Analysis, SAP, Power Bi, Tableau, Root Cause Analysis, Fmea, Process improvement, Spc, Productivity Improvement, Jmp, Risk Assessment, Problem-solving methodologies, Minitab, Defect reduction, yield enhancement, Doe, Manufacturing process control, Mes

power optimization , design for manufacturability, CPU circuit design, Design Verification, Simulation, Timing Analysis, advanced CMOS technology, functional validation, noise analysis, memory compilers, physical layout techniques, layout rule checks, EDA tools for circuit design and verification, schematic entry

Cosmos DB, Deep Learning, MLops, Python, Neo4j, LLMOps, GraphRAG, Prompt Engineering, Azure AI Foundry, Model Evaluation, Azure OpenAI, R, AI Agents, Azure AI Search, Data Pipelines, Knowledge Graphs, Generative AI

synopsys primetime , Tcl, Python, Perl, Static Timing Analysis, Clock Domain Crossing CDC, Timing Constraints SDC, Tempus, PrimeTime SI PX, OCV AOCV POCV methodologies, Crosstalk and Signal Integrity analysis, MCMM timing analysis

matching , parasitic reduction, Mentor Calibre, PLL subsystems, IP Layouts, Cadence Virtuoso-VXL, RF Transmitter, Dfm, RF Analog Layout, Receiver, Esd, submicron CMOS technologies, IR Drop EM Analysis