Physical Design Engineer
HCL TechBee- Posted 12 hours ago
- Be among the first 10 applicants
Job Description
Perform end to end physical design flow:
o Floorplanning
o Power planning (PG grid, IR)
o Placement & optimization
o CTS (Clock Tree Synthesis)
o Routing
o Post route optimization
• Achieve timing closure across all modes and corners
• Resolve DRC, LVS, ERC and signoff violations
• Handle low power design techniques:
o Multi Vt, Multi voltage (UPF)
o Power gating, clock gating
• Perform physical verification and signoff:
o STA (Primetime)
o SI / Crosstalk
o IR drop & EM analysis
• Work on advanced nodes (7nm, 5nm, 3nm or below)
• Collaborate with:
o RTL & Micro architecture teams
o DFT & Test engineers
o Foundry and CAD teams
• Debug complex timing, congestion, power, and variability issues
• Drive methodology improvements and automation (scripts/flows)
More Info
Key Skills
IR drop
Post route optimization
Clock gating
Crosstalk
Low power design techniques
Power gating
EM analysis
UPF
DRC
Multi Vt
Multi voltage
Placement optimization
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