Usb, Ovm, Soc, DDR, Pcie, Ethernet, System Verilog, Ip, Uvm, Video, MIPI, VMM, ARM Based SoC Verification, HDMI, dsi, CSI

Verilog, Ethernet, Python, Pcie, DDR, Modelsim, Synopsys VCS, VHDL, UCIe, Uvm, formal verification, Cadence Incisive

Computer Architecture, Vcs, DDR, Pcie, Perl, Ethernet, Python, Verdi, ARM-based SoC architecture, CHI, Xcelium, SystemVerilog UVM, Axi, APB, HBM, Questa, AHB, SVA

Spi, I2c, Gpio, Uart, Pcie, DDR, UVM methodology, I3C, QSPI, CXL, systemverilog, HBM

cache coherency , Uvm, DMA engines, ARM-based SoCs, memory systems, systemverilog, Transaction-level verification, CHI, Ace, AXI NoC architectures

Usb, Ovm, Pcie, Ethernet, Test and coverage plan, Verification environment, Coverage, Assertion checkers, Uvm, MIPI, VMM, Validation plan, System Verilog HVL, Scenario creation

Ovm, Pcie, CHI, Uvm, cache coherency concepts, CXL, systemverilog, Ace, Axi, interconnect and bus protocols, AMBA

IP SoC verification, ASIC-SoC design verification, systemverilog

Usb, System Verilog, Jtag, Ethernet, Python, Pcie, Perl, TSN, UVM methodology, SoC architecture verification, scripting in Linux Unix environments, High speed USB, Design for Debug, ARM based SoC verification