Physical Design Engineer

WE'RE HIRING: PHYSICAL DESIGN ENGINEERS

Work Mode: Onsite/Office

Eligibility: Only Malaysian Citizens, PR or RPT holders

Location: Penang, Malaysia

Employment Type: Full-time

We're partnering with a leading global semiconductor technology company to hire experienced Physical Design (PD) Engineers to support the development of next-generation ASIC and SoC solutions. This is an exciting opportunity to work on advanced-node chip designs and contribute to high-performance, power-efficient computing technologies.

Key Responsibilities

• Perform end-to-end ASIC physical design from Netlist to GDSII.
• Execute floorplanning, partitioning, placement, routing, and Clock Tree Synthesis (CTS).
• Drive timing closure by resolving setup, hold, transition, and signal integrity issues.
• Perform Static Timing Analysis (STA) across multiple operating conditions.
• Conduct physical verification, including DRC, LVS, ERC, and antenna checks.
• Design and optimize power delivery networks (PDN), including IR-drop analysis and low-power implementation techniques.
• Collaborate with cross-functional engineering teams to deliver high-quality silicon designs.

Key Requirements

• Bachelor's or Master's degree in Electrical, Electronic, Computer Engineering, or a related discipline.
• 4+ years of hands-on experience in ASIC Physical Design.
• Strong understanding of the complete Netlist-to-GDSII implementation flow.
• Experience with Synopsys (IC Compiler II, PrimeTime) and/or Cadence (Innovus, Tempus) tool suites.
• Strong knowledge of Static Timing Analysis (STA) and timing closure methodologies.
• Proficiency in Tcl, Perl, or Python scripting for design automation.
• Experience with advanced technology nodes (e.g., 7nm, 5nm, or 3nm) is highly preferred.

Does this sound like you or someone you know Apply now and send your most updated CV to: [Confidential Information]. Looking forward to see you!